The use of feed forward controllers in semiconductor processing has long been established in the fabrication of semiconductor integrated circuits by semiconductor manufacturing facilities (fabs). Until recently, wafers were treated as a batch or a lot and the same processing performed on each of the wafers in the lot. The size of the lot varies depending on the manufacturing practices of the fab but is typically limited to a maximum of 25 wafers. Measurements were routinely made on a few wafers in the lot and adjustments made to the processing based on these sample measurements. This method of control based on sample measurements on the lot and process recipe adjustments for the following lots is called lot-to-lot control (L2L). The process models and information necessary to modify the process recipes for L2L control were kept and the computations were performed at the fab level. Recently, manufacturers of semiconductor processing equipment (SPE) have included the ability to measure each wafer immediately before and after the processing is performed. The capability to measure each wafer on the processing tool is called integrated metrology (IM). IM enabled the ability to measure and adjust the process recipe at the wafer-to-wafer (W2W) level.
The structures on the semiconductor wafers have not only decreased in size but also have increased in density causing additional processing control problems. Areas on semiconductor wafers have been identified as being isolated areas or nested areas based on the density of structures within the particular area and problems have developed in the semiconductor processing due to these different densities.
The need for trim etch has become common, with many methods for trimming the Critical Dimension (CD) for gate length control. Iso/nested control has become part of the mask design process, including the modeling of the process through the etcher. The iso/nested model designed into the mask making process however is optimized for a single CD target related to an isolated or nested structure. As the need to shrink the gate by trimming and the need to change gate targets change over time, it is expensive to create new masks and re-optimize the iso/nested bias. The mask bias control is by use of the optical and process correction (OPC), sometimes called optical proximity correction, in which the apertures of the reticule are adjusted to add or subtract the necessary light to increase pattern fidelity. Another approach is phase-shift masks (PSM), in which topographic structures are created on the reticule to introduce contrast-enhancing interference fringes in the image. Another problem can occur when designers learn after the mask is made that the iso/nested bias requires adjusting to optimize performance after the mask is generated and the first setup sample parts are created.
What has not been addressed is a method to adjust the wafer CD bias between isolated and nested lines after pattering as part of the etch process when a soft mask is used.